Digital Design Fundamentals·Combinational Circuits
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The last lesson built a 2-to-1 MUX: one select line s chose between two inputs. One line has two states, so it can name two inputs.
To choose among four inputs you need to name four things, and one bit cannot. Two bits can: counts , which is exactly four addresses.
Figure: A trapezoid 4-to-1 MUX symbol with four data inputs i0, i1, i2, i3 stacked on the left, a single output y on the right
Read the two select lines as a 2-bit binary number:
Together they form an address from 0 to 3, and that address picks the input that reaches the output.
Rather than list all combinations of the four data inputs, the routing table shows only which input the address selects:
| Address | Output y | ||
|---|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 2 |
| 1 | 1 | 3 |
The address column is just in decimal. The output is whichever input carries that number.
This is a live 4-to-1 MUX. Set the two select bits to an address, then prove the routing.
Try it:
s1 = 0, s0 = 0. Toggle i0. The output follows it.i1, i2, i3. Nothing happens: only i0 is connected right now.s1 = 1, s0 = 0 (address 2). Now i2 drives the output and the others are ignored.The rule generalises. The number of select lines is the number of address bits, and each bit doubles the inputs you can reach.
| Select lines | Inputs addressed |
|---|---|
| 1 | 2 |
| 2 | 4 |
| 3 | 8 |
An 8-to-1 MUX needs 3 select lines. A 16-to-1 needs 4. Multiplexers this wide route data inside every processor: choosing which register feeds the ALU, which result goes to memory, which instruction runs next.