Digital Design Fundamentals·Combinational Circuits
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A decoder takes a binary address and activates exactly one output line, the one matching that address. Every other output stays 0.
Figure: A schematic-style diagram showing 2 binary input lines labelled A1, A0 feeding into a decoder block
A decoder takes a binary address and activates exactly one output line, the one matching that address. Every other output stays 0.
A 2-to-4 decoder with address bits a and b:
| a | b | ||||
|---|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 | 1 |
| 0 | 1 | 0 | 0 | 1 | 0 |
| 1 | 0 | 0 | 1 | 0 | 0 |
| 1 | 1 | 1 | 0 | 0 | 0 |
Exactly one output is 1 in every row. This pattern is called one-hot: one line hot, the rest cold.
Each output is a single AND gate that fires for exactly one input pattern. To detect , invert both inputs and AND them: , which is 1 only when both are 0.
Every output follows the same idea with a different mix of inverted inputs:
These are the four products of a two-variable sum of products, one per row.
This is a live 2-to-4 decoder: four AND gates, with inverters feeding the ones that need a 0.
Try it:
a = 0, b = 0. Only y0 lights.Figure: A grid of memory cells arranged in rows
This is where decoders earn their place. RAM is a grid of cells, and the processor must reach one row at a time.
Without a decoder there is no way to single out one location. Every memory in the chip depends on this circuit.